Publications

Last updated October 21, 2017. Also see my google scholar page


Conference and Journal Publications 

2017

MICRO

DeftNN: Addressing Bottlenecks for DNN Execution on GPUs via Synapse Vector Elimination and Near-compute Data Fission
Parker Hill, Animesh Jain, Mason Hill, Babak Zamirai, Chang-hong Hsu, Michael A. Laurenzano, Scott Mahlke, Lingjia Tang, Jason Mars
International Symposium on Microarchitecture (MICRO). Boston, MA. October, 2017.
Best Paper Nominee

TOCSReining in Long Tails in Warehouse-Scale Computers with QuickVoltage Boosting Using Adrenaline
Chang-hong Hsu, Yunqi Zhang, Michael A. Laurenzano, David Meisner, Thomas Wenisch, Ronald G. Dreslinski, Jason Mars, Lingjia Tang
Transactions on Computer Systems (TOCS). 2017.
  

2016

 
MICRO Concise Loads and Stores: The Case for an Asymmetric Compute-Memory Architecture for Approximation
Animesh Jain, Parker Hill, Shih-Chieh Lin, Muneeb Khan, Md E. Haque, Michael A. Laurenzano, Scott Mahlke, Lingjia Tang, Jason Mars
International Symposium on Microarchitecture (MICRO). Taipei, Taiwan. October, 2016.

MICRO CrystalBall: Statically Analyzing Runtime Behavior via Deep Sequence Learning
Steve Zekany, Daniel Rings, Nathan Harada, Michael A. Laurenzano, Lingjia Tang, Jason Mars
International Symposium on Microarchitecture (MICRO). Taipei, Taiwan. October, 2016.

MICRO Continuous Shape Shifting: Enabling Loop Co-optimization via Near-free Dynamic Code Rewriting
Animesh Jain, Michael A. Laurenzano, Lingjia Tang, Jason Mars
International Symposium on Microarchitecture (MICRO). Taipei, Taiwan. October, 2016.

Top Picks Sirius Implications for Future Warehouse-Scale Computers
Johann Hauswald, Michael A. Laurenzano, Yunqi Zhang, Cheng Li, Austin Rovinski, Arjun Khurana, Ronald G. Dreslinski, Trevor Mudge, Vinicius Petrucci, Lingjia Tang, Jason Mars
IEEE Micro: Top Picks from the 2015 Computer Architecture Conferences. 2016.

ICER Lightweight, Early Identification of At-Risk CS1 Students
Soohyun Nam Liao, Daniel Zingaro, Michael A. Laurenzano, William G. Griswold, Leo Porter
International Computer Education Research Conference (ICER). Melbourne, Australia. September, 2016. 

ISCA PowerChop: Identifying and Managing Non-Critical Units in Hybrid Processor Architectures [slides] [lightning slides]
Michael A. Laurenzano, Yunqi Zhang, Jiang Chen, Lingjia Tang, Jason Mars
International Symposium on Computer Architecture (ISCA). Seoul, Korea. June, 2016.

PLDI Input Responsiveness: Using Canary Inputs to Dynamically Steer Software Approximation [slides] [recorded talk]
Michael A. Laurenzano, Parker Hill, Mehrzad Samadi, Scott Mahlke, Jason Mars, Lingjia Tang
Programming Language Design and Implementation (PLDI). Santa Barbara, CA. June, 2016.

TOCS Designing Future Warehouse-Scale Computers for Sirius, an End-to-End Voice and Vision Personal Assistant
Johann Hauswald, Michael A. Laurenzano, Yunqi Zhang, Hailong Yang, Yiping Kang, Cheng Li, Austin Rovinski, Arjun Khurana, Ronald G. Dreslinski, Trevor Mudge, Vinicius Petrucci, Lingjia Tang, Jason Mars
Transactions on Computer Systems (TOCS). 2016.
Invited Paper

ISPASS Characterization and Bottleneck Analysis of a 64-bit ARMv8 Platform [slides] [data]
Michael A. Laurenzano, Ananta Tiwari, Allyson Cauble-Chantrenne, Adam Jundt, William A. Ward, Jr., Roy Campbell, Laura Carrington
International Symposium on the Performance Analysis of Systems and Software (ISPASS). Uppsala, Sweden. April, 2016.

2015

 
PACT AREP: Adaptive Resource Efficient Prefetching for Maximizing Multicore Performance 
Muneeb Khan, Michael A. Laurenzano, Jason Mars, Erik Hagersten, David Black-Schaffer
Parallel Architectures and Compilation Techniques (PACT). San Francisco, CA. October, 2015.

ISCA DjiNN and Tonic: DNN as a Service and Its Implications for Future Warehouse Scale Computers [video] [software]
Johann Hauswald, Yiping Kang, Michael A. Laurenzano, Quan Chen, Cheng Li, Trevor Mudge, Ronald G. Dreslinski, Jason Mars, Lingjia Tang 
International Symposium on Computer Architecture (ISCA). Portland, OR. June, 2015. 

ASPLOS Sirius: An Open End-to-end Voice and Vision Personal Assistant and Its Implications for Future Warehouse Scale Computers [video] [software]
Johann Hauswald, Michael A. Laurenzano, Yunqi Zhang, Cheng Li, Austin Rovinski, Arjun Khurana, Ronald G. Dreslinski, Trevor Mudge, Vinicius Petrucci, Lingjia Tang, Jason Mars 
Architectural Support for Programming Languages and Operating Systems (ASPLOS). Istanbul, TR. March, 2015. 
Selected for IEEE Micro Top Picks in Computer Architecture

HPCA Adrenaline: Pinpointing and Reining in Tail Queries with Quick Voltage Boosting
Chang-Hong Hsu, Yunqi Zhang, Michael A. Laurenzano, David Meisner, Thomas Wenisch, Jason Mars, Lingjia Tang, Ronald G. Dreslinski
High Performance Computer Architecture (HPCA). San Francisco, CA. February, 2015.

HPCA Octopus-Man: QoS-Driven Task Management for Heterogeneous Multicores in Warehouse Scale Computers
Vinicius Petrucci, Michael A. Laurenzano, John Doherty, Yunqi Zhang, Daniel Mosse, Lingjia Tang, Jason Mars
High Performance Computer Architecture (HPCA). San Francisco, CA. February, 2015.

2014

 
MICRO Protean Code: Achieving Near-free Online Code Transformations for Warehouse Scale Computers [slides] [video] [lightning slides]
Michael A. Laurenzano, Yunqi Zhang, Lingjia Tang, Jason Mars
International Symposium on Microarchitecture (MICRO). Cambridge, UK. December, 2014. 

MICRO SMiTe: Precise QoS Prediction on Real-System SMT Processors to Improve Utilization in Warehouse Scale Computers
Yunqi Zhang, Michael A. Laurenzano, Jason Mars, Lingjia Tang
International Symposium on Microarchitecture (MICRO). Cambridge, UK. December, 2014.

TACO Making the Most of SMT in HPC: System- and Application-level Perspectives
Leonard Porter, Michael A. Laurenzano, Ananta Tiwari, Adam Jundt, William A. Ward, Jr., Roy Campbell, Laura Carrington
Transaction on Architecture and Code Optimization (TACO). 2014.

Euro-Par Characterizing the Performance-Energy Tradeoff of Small ARM Cores in HPC Computation [slides] [data]
Michael A. Laurenzano, Ananta Tiwari, Adam Jundt, Joshua Peraza, William A. Ward, Jr., Roy Campbell, Laura Carrington
European Conference on Parallel Processing (Euro-Par). Porto, Portugal. August, 2014. 

Euro-Par Modeling the Impact of Reduced Memory Bandwidth on HPC Applications
Ananta Tiwari, Anthony Gamst, Michael A. Laurenzano, Martin Schulz, Laura Carrington
European Conference on Parallel Processing (Euro-Par). Porto, Portugal. August, 2014.

2013

 
PPL Characterizing Large-scale HPC Applications through Trace Extrapolation
Laura Carrington, Michael A. Laurenzano, Ananta Tiwari
Parallel Processing Letters (PPL). 2013.

CCJ PEBIL: Binary Instrumentation for Practical Data-Intensive Program Analysis 
Michael A. Laurenzano, Joshua Peraza, Laura Carrington, Ananta Tiwari, William A. Ward, Jr., Roy Campbell
Cluster Computing Journal (CCJ). 2013.

CCPE PMaC's Green Queue: A Framework for Selecting Energy Optimal DVFS Configurations in Large Scale MPI Applications
Joshua Peraza, Ananta Tiwari, Michael A. Laurenzano, Laura Carrington, Allan Snavely
Concurrency and Computation: Practice and Experience (CCPE). 2013.

CCPE The Case for Colocation of HPC Workloads
Alex Breslow, Leonard Porter, Ananta Tiwari, Michael A. Laurenzano, Dean Tullsen, Laura Carrington, Allan Snavely
Concurrency and Computation: Practice and Experience (CCPE). 2013.

Pre-2013

 
Euro-par '11 Reducing Energy Usage with Memory and Computation-aware Dynamic Frequency Scaling [slides]
Michael A. Laurenzano, Mitesh Meswani, Laura Carrington, Allan Snavely, Mustafa M. Tikir, Stephen Poole
European Conference on Parallel Processing (Euro-Par). Bordeaux, FR. August, 2011.

ICS '11 An Idiom-finding Tool for Increasing Productivity of Accelerators
Laura Carrington, Mustafa M. Tikir, Cathie Olschanowsky, Michael A. Laurenzano, Joshua Peraza, Allan Snavely, Stephen Poole
International Conference on Supercomputing (ICS). Tucson, AZ. May, 2011.

ISPASS '10 PEBIL: Efficient Static Binary Instrumentation for Linux [software]
Michael A. Laurenzano, Mustafa M. Tikir, Laura Carrington, Allan Snavely
International Symposium on Performance Analysis of Systems and Software (ISPASS). White Plains, NY. March, 2010.

Euro-Par '09 PSiNS: An Open Source Event Tracer and Execution Simulator for MPI Applications [software]
Mustafa M. Tikir, Michael A. Laurenzano, Laura Carrington, Allan Snavely
European Conference on Parallel Processing (Euro-Par). Delft, NL. August, 2009.

SC '08 High-Frequency Simulations of Global Seismic Wave Propogation Using SPECFEM3D_GLOBE
Laura Carrington, Dimitri Komatitsch, Michael A. Laurenzano, Mustafa M. Tikir, David Michea, Nicholas Le Goff, Allan Snavely, Jeroen Tromp
International Conference on High Performance Computing, Networking, Storage and Analysis (SC). Austin, TX. November, 2008.
ACM Gordon Bell Prize Finalist

SC '05 How Well Can Simple Metrics Represent the Performance of HPC Applications?
Laura Carrington, Michael A. Laurenzano, Allan Snavely, Roy Campbell, Larry Davis
International Conference on High Performance Computing, Networking, Storage and Analysis (SC). Seattle, WA. November, 2005.

IISWC '05 Reducing Overheads for Acquiring Dynamic Traces 
Xiaofeng Gao, Michael A. Laurenzano, Beth Simon, Allan Snavely 
International Symposium on Workload Characterization (IISWC). Austin, TX. September, 2005.
  


Workshop and Other Publications


WAX '16 Statistical Error Bounds for Data Parallel Applications
Parker Hill, Michael A. Laurenzano, Babak Zamirai, Mehrzad Samadi, Scott Mahlke, Jason Mars, Lingjia Tang
Workshop on Approximate Computing Across the Stack (WAX). Atlanta, GA. April, 2016.

WAX '16 CPSA: Compute Precisely Store Approximately
Animesh Jain, Parker Hill, Michael A. Laurenzano, Md E. Haque, Muneeb Khan, Scott Mahlke, Lingjia Tang, Jason Mars
Workshop on Approximate Computing Across the Stack (WAX). Atlanta, GA. April, 2016.

E2SC '15 Compute Bottlenecks on the New 64-bit ARM
Adam Jundt, Allyson Cauble-Chantrenne, Ananta Tiwari, Joshua Peraza, Michael A. Laurenzano, Laura Carrington
Workshop on Energy Efficient Supercomputing (E2SC). Austin, TX. November, 2015.

Co-HPC '15 Performance and Energy Analysis of 64-bit ARM using GAMESS
Ananta Tiwari, Kristopher Keipert, Adam Jundt, Sarom S. Leang, Michael A. Laurenzano, Mark S. Gordon, Laura Carrington
Workshop on Hardware-software Co-design for High Performance Computing (Co-HPC). Austin, TX. November, 2015.

WAX '15 Approximating with Input-level Granularity
Parker Hill, Michael A. Laurenzano, Mehrzad Samadi, Scott Mahlke, Jason Mars, Lingjia Tang
Workshop on Approximate Computing Across the Stack (WAX). Portland, OR. June, 2015.

MODSIM '14 Adaptive Model-driven Facility-wide Management of Energy Efficiency and Reliability 
Ananta Tiwari, Michael A. Laurenzano, Adam Jundt, Willam A. Ward, Jr., Roy Campbell, Laura Carrington 
Workshop on Modeling and Simulation of Exascale Systems and Applications (MODSIM). Seattle, WA. August, 2014.

MODSIM '13 Viewing Application/Machine Interactions through Computational Idioms [slides
Michael A. Laurenzano, Laura Carrington, Adam Jundt, Ananta Tiwari, Joshua Peraza, William A. Ward, Jr., Roy Campbell
Workshop on Modeling and Simulation of Exascale Systems and Applications (MODSIM). Seattle, WA. September, 2013.

LSPP '13 Inferring Large-scale Computation Behavior via Trace Extrapolation
Laura Carrington, Michael A. Laurenzano, Ananta Tiwari
Workshop on Large-Scale Parallel Processing (LSPP). May, 2013.

DISCS '12 A Static Binary Instrumentation Threading Model for Fast Memory Trace Collection
Michael A. Laurenzano, Joshua Peraza, Laura Carrington, Ananta Tiwari, William A. Ward, Jr., Roy Campbell
International Workshop on Data-Intensive Scalable Computing Systems (DISCS). Salt Lake City, UT. November, 2012.

DISCS '12 Efficient HPC Data Motion via Scratchpad Memory
Kayla Seager, Ananta Tiwari, Michael A. Laurenzano, Joshua Peraza, Pietro Cicotti, Laura Carrington
International Workshop on Data-Intensive Scalable Computing Systems (DISCS). Salt Lake City, UT. November, 2012.

CGC '12 Green Queue: Customized Large-scale Clock Frequency Scaling 
Ananta Tiwari, Michael A. Laurenzano, Joshua Peraza, Laura Carrington, Allan Snavely
International Conference on Cloud and Green Computing (CGC). Xiantang, CH. November, 2012.

HPPAC '12 Modeling Power and Energy Usage of HPC Kernels
Ananta Tiwari, Michael A. Laurenzano, Laura Carrington, Allan Snavely
Workshop on High-Performance, Power-Aware Computing (HPPAC). Shanghai, CH. May, 2012.

PROPER '11 Auto-tuning for Energy Usage in Scientific Applications 
Ananta Tiwari, Michael A. Laurenzano, Laura Carrington, Allan Snavely
Workshop on Productivity and Performance (PROPER). Bordeaux, FR. August, 2011.

WBIA '08 The PMaC Binary Instrumentation Library for PowerPC
Mustafa M. Tikir, Michael A. Laurenzano, Laura Carrington, Allan Snavely
Workshop on Binary Instrumentation and Applications (WBIA). San Jose, CA. October, 2008.

MS Exam '07 Obtaining Dynamic Program Information with Binary Instrumentation (not peer reviewed)
Michael A. Laurenzano
UC San Diego M.S. Research Examination. February, 2007.

WBIA '05 Low Cost Trace-driven Memory Simulation using SimPoint
Michael A. Laurenzano, Beth Simon, Allan Snavely, Meghan Gunn
Workshop on Binary Instrumentation and Applications (WBIA). St. Louis, MO. September, 2005.